Ed25519 vs bls performance

There is this FPGA implementation for BLS12-381 by Ben Devlin

In the architecture docs they describe performance characteristics:

performance was benchmarked vs the Rust bls12_381 crate on a 32GB, 3.7GHz i5-9600K CPU. FPGA is running at 200MHz. … see a 2.9x speedup in the final ate pairing.

I would have thought more than 2.9x speedup. They list 4 points for Future Optimizations, but anyway, this was an interesting result to me, I would have expected greater speed improvements.

Video presentation on the library on youtube: Ben Devlin | Blockchain Acceleration Using FPGAs.

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